[CrackMonkey] Don Golding muses: "... replace the 68HC11 and Forth with an ASIC/FPGA VHDL..."

[George J.P. Perry]

Don... Fox, Rible, & Ting have implemented chip-Forth... Carpenter
programmes meetings @ svfig; may be you might come & tell us more about
your projects.  

All... ?Who was it who said that Forth isn't fit for pigs... he's *so*
right.  Thanks, pigdog, for helping budge the mountain.  

- George Perry... Spokesmodel, Silicon Valley Forth Interest Group

On Wed, 16 Feb 2000, Don Golding wrote: 

> Date: Wed, 16 Feb 2000 13:13:48 -0000
> From: Don Golding <angelus at ix.netcom.com>
> Reply-To: pigdog-l at bearfountain.com
> To: vic plichota <atsvap at cgo.wave.ca>,
>     Myron Plichota <myron.plichota at sympatico.ca>,
>     misc at pisa.rockefeller.edu, John Rible <jrible at sandpipers.com>
> Subject: [Pigdog] Re: Simple Forth processor witten in VHDL.
> 
> A couple of items regarding this project.  I have been programming in Forth
> for over ten years now.  It is used in all of our robot products.  The
> educational line of robots that include Whiskers, uses a 68HC11 with Forth
> on it.  This machine is programmable by the user.  Forth is essential for
> this product.  We also make military robots that are really embedded systems
> where the user does not need to program the robot at all.  These systems use
> the 68HC11 with Forth currently.  I envision being able to replace the
> 68HC11 and Forth with an ASIC/FPGA VHDL solution down the road.  I looked
> around for someone who might have implemented a Forth Processor and really
> only found one person in China and he didn't finish it.  It was based on the
> MISC type architecture.  So I said to myself, I guess I will work one and
> see if there is any interest out there to help if it is public domain
> design.
> 
> My personal reasons are:
> 
>     1) Learn how to build systems in VHDL.
>     2) Build a Forth Processor for people to use in their designs.
>     3) It will be fun and educational, everyone who participates will learn
> some interesting stuff about Forth Processors, VHDL and FPGA's.
>     4) I also am very curious about the gates count/FPGA cost to implement
> the design.
> 
> I talked to Quicklogic, if we supply them the VHDL code and an order for 100
> chips, it would cost only $16 if the code would fit on their 12,000 gate 84
> pin PLCC device.  A 25,000 144 pin device would be about $31 dollars.
> 
> A 200 mhz Forth Processor with custom I/O ports for these prices would
> interest me, anyway.
> 
> Don Golding
> 
> 
>